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所在平台: Udemy |
课程主页: https://www.udemy.com/course/vsd-rtl-synthesis-qa-webinar/
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课程名称：VSD - RTL综合问答网络研讨会 课程概述：欢迎参加首个关于使用Yosys进行RTL综合的问答网络研讨会。本次网络研讨会于2018年5月19日举行，主讲人是Clifford Wolf。Clifford是Yosys的架构师，Yosys是一个用于Verilog RTL综合的框架，目前支持广泛的Verilog-2005，并为各种应用领域提供了一套基本的综合算法。Clifford将回答23个关于RTL综合的提问。前23个提交的问题将直接获得我们公司VSD Corp. Pvt. Ltd.的证书。在课程中，我与Clifford合作了TCL编程的第一和第二部分，感谢他在TCL编程课程制作中的指导。Clifford拥有超过20年的经验，被誉为Yosys的架构师和创始人，同时还参与了OpenSCAD、SPL、EmbedVM和ROCK Linux等多个项目。祝您学习愉快！
Welcome to first ever QnA webinar on RTL synthesis using Yosys. This webinar was conducted on 19th May, 2018 with Clifford Wolf Its a Q & A webinar on RTL Synthesis, by Clifford Wolf. Clifford is architect of Yosys which is a framework for Verilog RTL synthesis. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for various application domains. Clifford will be answering 23 queries on RTL synthesis. TOP23 query submissions are directly eligible for certificates from our company VSD Corp. Pvt. Ltd. Note of Appreciation I have worked with Clifford in my course on TCL programming Part 1 & 2, and really Thank him for all his guidance for making of TCL programming course. Clifford has more than 20+ years of experience and is been known the Architect and Father of Yosys, OpenSCAD (now maintained by Marius Kintel), SPL (a not very popular scripting language), EmbedVM (a very simple compiler+vm for 8 bit micros), Lib(X)SVF (a library to play SVF/XSVF files over JTAG), ROCK Linux (discontinued since 2010) All the best and happy learning.
