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所在平台: Udemy |
课程主页: https://www.udemy.com/course/vsd-embedded-uvm/
课程评论：没有评论
课程名称：VSD - Embedded-UVM 课程概述：本课程探讨开源验证的需求，但不仅限于此。我们还将关注其他验证趋势和挑战，而这些是系统Verilog和其他验证平台无法满足的。在过去的十年里，验证变得越来越困难，主要原因是摩尔定律的结束。处理器频率稳定在4GHz并逐渐下降，尤其是在多核处理器环境下。从模拟角度来看，自2005年起，在更大芯片上进行模拟变得越来越具有挑战性。随着芯片尺寸的增加而处理器速度保持不变，模拟速度成为限制因素，除非我们转向多核处理器。当前的电子设计自动化（EDA）工具在多核环境中运行RTL模拟，而System Verilog无法在多核环境下运行。因此，测试平台在一个线程上运行，而RTL在多个线程上运行。RTL更为正式，可以进行综合和分区，不同的分区可以在不同的处理器上运行，而测试平台则是行为驱动的，无法像RTL那样进行分区。 关于讲师：Puneet Goel于1994年毕业于旁遮普工程学院，拥有24年的VLSI行业经验，曾在STMicro、摩托罗拉、德州仪器和TranSwitch工作。在过去的8年里，他在Coverity Systems Technology工作，提供验证服务并致力于创建可行的开源芯片验证解决方案。Puneet是Embedded UVM的主要开发者。 大纲：无
Of course, there is a requirement for open-source verification, but that's not the only thing we want to cater to. There are other verification trends and challenges which system Verilog and other verification platforms are not able to meet. So, we want to position Embedded-UVM for that. In the past decade or so, the major thing which is making verification tougher than it used to be, is the death of Moore's law.As far as processor frequency goes, it stabilizes at 4GHz and it's coming down as we move to multi-core processors. So, when you look at it from a simulation perspective, post-2005 it is becoming increasingly difficult to run simulations on bigger chips.Chip size keeps increasing, while processor speed is stagnant and hence, simulation is a limiting factor. Simulation speed is going to be limited unless we move to multi-core processors. Contemporary EDA tools run RTL simulations in a multi-core environment. System Verilog doesn't run in a multi-core environment.Therefore, test-bench runs on one thread and RTL runs on multiple threads. RTL is more formal in nature, in sense, it can be synthesized, it can be partitioned, different partitions can run on different processors, while test-bench is behavioral in nature and it cannot be partitioned the way RTL can be.About Speaker:Puneet Goel is a 1994 graduate in Electronics from Punjab Engineering College. He has 24 years of experience in the VLSI industry where he worked for STMicro, Motorola, Texas Instruments and TranSwitch.For the past 8 years, he has been working for Coverity Systems Technology, where he provides verification services and works on creating viable opensource solutions for chip verification. Puneet is the main developer of Embedded UVM.
