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所在平台: Udemy |
课程主页: https://www.udemy.com/course/vlsi-design-for-test-dft-jtag-boundary-scan-and-ijtag/
课程评论：没有评论
**课程名称：** VLSI - 可靠性设计 (DFT) - JTAG、边界扫描和 IJTAG **课程概述：** 本课程深入探讨 JTAG、边界扫描 (Boundary Scan) 和 IJTAG 的详细概念，并辅以多个实例。课程将重点讲解 IEEE 1149.1 和 IEEE 1687-2014 标准。您将学习 JTAG TAP 状态机的运作原理，以及它如何用于测试印刷电路板 (PCB) 上不同芯片之间的连接性。此外，课程还将讨论 IJTAG 的运作机制、ICL (Internal Connectivity Language) 和 PDL (Procedural Description Language) 等概念。
This course talks about detailed concepts on JTAG, Boundary Scan and IJTAG with several examples. This course teaches in-depth details on IEEE1149.1 and IEEE 1687-2014 standard. You will also learn about how JTAG TAP state machine operates and how it is used to do connectivity test between difference chips in Printed Circuit Board (PCB)The IJTAG operation, ICL and PDL concepts are also discussed in this course.
