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所在平台: Udemy |
课程主页: https://www.udemy.com/course/vlsi-academy-library-characterization-part-1/
课程评论：没有评论
课程名称：VSD - 库的特性化与建模 - 第一部分 课程概述：如果你是STA工程师、PNR工程师、CTS工程师，或是一般的物理设计师或综合工程师，你一定听说过“库”这个词。这个课程详细解释了库的定义。库可以被称为半导体工业的灵魂和核心，没有它们就无法生产单一芯片。掌握库的知识对于理解其他课程至关重要。本课程全面介绍现代和先进节点电路的特性化技术及高级建模。你还将了解设计一个简单单输入反相器背后的过程。像反相器、缓冲器、与门、或门等电路被称为单元，你会惊讶于它们在实际IC设计中的表现。本课程与领先的特性化公司Paripath合作设计，Paripath开发了最先进的特性化软件GUNA。感谢Paripath团队为本课程设计实验的贡献。本课程旨在填补特性化与建模领域的空白。商标提示：Liberty是Synopsys Inc.的注册商标；Verilog是Cadence Design Systems, Inc.的注册商标；SDF和SPEF是开放Verilog国际组织的商标。立即加入，开始你人生中一次难忘的学习之旅。祝学习愉快！
If you are STA engineer or PNR engineer or CTS engineer or, in general, a physical designer or Synthesis engineer, you must have definitely come across the word 'Library'. This course explains you, in detail, what it exactly means. You can call Library as the soul and heart of Semiconductor industries. Without them, you can't have single chip out. Without the knowledge of Libraries, all other courses are incomplete. Guess what, you are at the right page. This course gives a comprehensive overview of characterization techniques and advanced modelling of circuits for modern and advanced nodes. Not only that, you will see what goes behind designing a simple single input inverter. The gates like inverter, buffer, AND, OR are all called as cell, and you will be amazed to see how are the represented in real IC design. This course is designed in collaboration with leading characterization company Paripath, who have designed the state-of-the-art characterization software called GUNA I would like to Thank complete Paripath team for helping me in designing experiments for this course. This course is motivated by desire to fill gap on characterization and modelling Trademark: Liberty is a registered trademark of Synopsys Inc. Verilog is a registered trademark of Cadence Design Systems, Inc. SDF and SPEF are trademarks of Open Verilog International Get in right now and have an unforgettable journey of your life. Happy Learning!!
