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所在平台: Udemy |
课程主页: https://www.udemy.com/course/vlsi-academy-crosstalk/
课程评论：没有评论
课程名称：VSD - 信号完整性 课程概述：芯片设计的三大支柱是性能、功耗和面积，而串扰会影响这三者。串扰是指由于电路之间的通信而产生的干扰。课程旨在教授如何减少串扰，以实现高效的芯片设计，达到最佳性能、最优功耗和最小芯片面积。 课程内容： - 串扰产生的原因 - 噪声裕度简介 - 串扰故障实例 - 影响故障高度的因素 - 交流噪声裕度 - 时间窗口概念 - 串扰对设置和保持定时的影响 - 减少串扰的技术 - 电源噪声 通过本课程，学习者将深入理解串扰的影响及其对芯片设计的作用，并掌握有效降低串扰的策略。最终目标是提升芯片设计的整体效率，实现更可靠的电路性能。
Performance, Power and Area are the three main pillars of the Chip Design, Crosstalk can hamper all three. Crosstalk is the interference caused due to communication between the circuits Lets learn to " HOW TO REDUCE CROSSTALK ? " to achieve a efficient Chip design which give the best performance, uses optimal power and in minimal Chip area. Course Details: •Reasons for Crosstalk •Introduction to Noise Margin •Crosstalk Glitch Example •Factors Affecting Glitch Height •AC Noise Margin •Timing Window Concepts •Impact of Crosstalk on Setup and Hold Timing •Techniques to reduce Crosstalk •Power Supply Noise
