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所在平台: Udemy |
课程主页: https://www.udemy.com/course/systemverilog-assertions-language-and-applications/
课程评论：没有评论
课程名称：从零开始的SystemVerilog断言与功能覆盖 课程概述：本课程全面讲解SystemVerilog断言（SVA）和功能覆盖（FC），涵盖SV LRM 2005/2009及2012版本的特点。课程不要求学员具备面向对象编程（OOP）或UVM的先前知识。授课教师是一位在CPU和SoC设计领域拥有30年经验的专家，2016年出版了关于SVA和FC的第二版书籍，并拥有19项美国设计验证专利。本课程包含50多节讲座，持续时间超过12小时，将循序渐进地引导学员学习这些语言。 通过本课程所获得的知识，将帮助学员发现和覆盖那些关键且难以发现的设计缺陷。SystemVerilog断言和功能覆盖是整体功能验证方法论中至关重要的部分，所有验证工程师都需要掌握这些知识以获得成功。掌握SVA和FC的知识将成为您寻求具有挑战性的工作或项目时的简历亮点。课程提供逐步指导，帮助学员快速将SVA和FC应用到自己的项目中，结合丰富的现实案例，确保学员能在最短时间内掌握技能。SVA和FC能够涵盖功能和顺序领域的关键方面，而这些是代码覆盖所无法实现的。
SystemVerilog Assertions and Functional Coverage is a comprehensive from-scratch course on Assertions and Functional Coverage languages that cover features of SV LRM 2005/2009 and 2012. The course does not require any prior knowledge of OOP or UVM. The course is taught by a 30 year veteran in the design of CPU and SoC who has published the second edition of a book on SVA and FC in 2016 and holds 19 U.S. patents in design verification. The course has 50+ lectures and is 12+ hours in length that will take you step by step through learning of the languages.The knowledge gained from this course will help you find and cover those critical and hard to find design bugs. SystemVerilog Assertions and Functional Coverage are very important parts of overall functional verification methodology and all verification engineers need this knowledge to be successful. The knowledge of SVA and FC will be highlights of your resume when seeking a challenging job or project. The course offers step-by-step guide to learning of SVA and FC with plenty of real life applications to help you apply SVA and FC to your project in shortest possible time. SVA and FC helps critical aspect of Functional and Sequential domain coverage which is simply not possible with code coverage.
