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所在平台: Udemy |
课程主页: https://www.udemy.com/course/randomization-and-ipc-in-systemverilog/
课程评论：没有评论
**课程名称：SystemVerilog中的随机化与进程间通信** **课程概述：** 本课程是为希望学习SystemVerilog高级验证技术的学习者设计的，重点关注随机化和进程间通信（IPC）。课程假设学习者已掌握SystemVerilog基本语法和面向对象编程知识。 随着VLSI行业对验证工程师的需求日益增长，以及当前设计日益复杂的挑战，强大的、灵活的测试平台设计成为验证工程师的必备技能。SystemVerilog提供了多种构造，能够极大地简化验证工作。 **课程内容：** * **随机化：** * 何时进行随机化 * 如何进行约束随机化 * **进程间通信（IPC）：** * 各种IPC技术的介绍 * 重点讲解：事件（events）、信号量（semaphores）、邮箱（mailboxes） **学习方式：** * 课程通过丰富的示例进行教学。 * 每个章节都设有测验，帮助学习者监控自身进度。 * 学习者可以尝试在EDA Playground等环境中模拟课程中的示例，以验证理论概念。 **学习成果：** 完成本课程后，学习者将能够熟练运用随机化和IPC技术来设计强大的测试平台。
VLSI industry requires more verification engineers and less design engineers. Roughly this ratio is around 70 to 30 percent respectively. Because todays designs are not only very complex but also challenging to verify due to technological advancements at all the levels of design. There are many techniques that are required to be known to today's verification engineers. How to design powerful and flexible test bench is always a challenge for verification engineers. SystemVerilog provides various constructs which can ease the job of verification engineer. However one should have basic knowledge about those constructs.This course is introduced for learners who wants to learn advanced verification techniques of randomization and inter-process communication (IPC) in SystemVerilog. It is assumed that learner is aware of the basic constructs of SystemVerilog and object oriented programming. In this course, students will learn when to do randomization, how to do constraint randomization, what are various inter-process communication techniques etc. Various IPC techniques like events, semaphores and mailboxes will be introduced. Course is being taught with various examples and learner can monitor self-progress by attempting quiz in each section. Students can try to simulate all the examples discussed in the course in EDA Playground and verify the theoretical concepts. After learning this course, students will be able to apply randomization and IPC techniques while designing test bench.
