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所在平台: Udemy |
课程主页: https://www.udemy.com/course/phase_locked_loops/
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课程名称：射频电路与系统 - 齐锁环的基本原理 课程概述：本课程专注于相位锁定环的研究与设计，以及相位锁定的概念。我们将学习相位锁定环的基本原理，它是一种闭环系统，用于跟踪外部周期信号。相位探测器会检测参考信号与环内振荡器输出信号之间的相位差，这一相位差会通过低通滤波器（LPF）提取出来。LPF的输出信号将控制电压控制振荡器（VCO）的振荡频率，使得在稳态下，VCO的输出频率恰好等于输入频率。在实际操作中，还会在VCO和相位探测器输入之间插入一个频率分频器链，以实现闭环频率倍增器。 课程将讨论相位锁定环的跟踪特性，并了解到捕获过程是一个非线性现象。接着，我们将深入研究相位探测器的实现，并介绍相位频率探测器的概念，为二型相位锁定环打下基础。我们将特别研究一种广泛使用的二型相位锁定环——电荷泵相位锁定环，分析其动态行为并推导相位锁定环的传递函数。由于非理想因素，电荷泵相位锁定环的输出会出现频率波动，课程也将讨论这些非理想因素带来的问题。 此外，VCO的相位噪声和输入参考信号的噪声会降低相位锁定环的输出相位噪声。我们将研究这些噪声源对相位锁定环相位噪声的影响。随后，课程将介绍延迟锁定环（DLL）及其应用。最后，我们将探讨相位锁定环的实际应用，看到在许多电子电路中，频率合成都是通过相位锁定环实现的，同时相位锁定环也可以有效地用于强大的时间偏差减少技术。
This course focuses on the study and design of phase-locked loops and the concept of phase-locking. We will learn that a phase-locked loop is essentially a closed-loop system that tracks an external periodic signal. A phase detector detects the phase difference between the reference and the signal coming from the oscillator within the loop. This phase difference is then extracted by a lowpass filter (LPF). The LPF output then controls the oscillation frequency of a voltage-controlled oscillator (VCO) in a way that in the steady state, the VCO output frequency is exactly equal to that of the input. In practice, a frequency divider chain is inserted between the VCO and the phase detector input to realize a closed-loop frequency multiplier. We will learn about the tracking characteristics of a PLL, and will see that the capture (acquisition) process is a nonlinear phenomenon. The course then digs deep into the phase detector implementation, followed by the concept of the phase-frequency detector. This will lay the groundwork for type-II PLL. We will specifically study a widely used type-II PLL, called charge-pump PLL. We will study the dynamic behavior of the charge-pump PLL and derive the PLL transfer function. We will learn that due to non-idealities, frequency fluctuation will appear at the output of the charpe-pump PLL. We will go through the issues due to these non-idealities and present some problems. The VCO phase noise and the noise coming from the input reference degrade the PLL output phase noise. We will study the impact of these sources of noise on the PLL phase noise. The course will then go through the concept of the delay-locked loop (DLL) and its applications. The course will finally discuss applications of the phase-locked loop. We will see the frequency synthesis in many electronic circuits will be realized by a PLL. We will see that PLL can effectively be used to realize a powerful skew reduction technique.
