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所在平台: Udemy |
课程主页: https://www.udemy.com/course/phase-lock-loop-online-course-rahsoft-system-design-theory/
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课程名称：相位锁定环系统设计理论与原则 RAHRF469 课程概述：该课程专注于相位锁定环（PLL）理论和行为建模。PLL是射频通信收发器系统中最重要的组成部分之一。PLL系统广泛应用于各种高频领域，从简单时钟电路到高性能无线电通信链路的局部振荡器（LO），以及在矢量网络分析仪（VNA）中用于超高频切换的频率合成器。本课程详细讲解了不同类型的PLL以及各个子模块的功能，涵盖了PLL的设计和计算，并提供了丰富的实例和作业。课程中还包括使用高级设计系统（ADS）软件进行系统级仿真和行为设计。我们将通过方程式和系统分析讨论PLL的相位噪声，并提供教程指导学员模拟PLL的行为相位噪声模型，观察系统对电压控制振荡器（VCO）相位噪声的影响。此外，本课程还讨论了分数PLL的概念和特点。值得注意的是，本课程关注PLL子模块的行为分析，但不涉及晶体管级的仿真，这部分内容将在Rahsoft未来发布的其他课程中覆盖。 课程先修要求及需熟悉的主题包括：中级电子学和模拟电路设计、基础控制理论、ADS软件，以及以下概念：开环和闭环增益、开环-闭环系统、反馈、传递函数、相位裕度、CMOS晶体管、基本运算放大器和拉普拉斯变换。请注意，本课程包含更多的数学内容，与之前的课程相比，PLL系统设计需要理解传递函数推导和稳定性分析，涉及系统计算，并需要大学水平的数学计算。
This course focuses on phase locked loops (PLL) theory and behavioral modeling. PLLs are one of the most important blocks in RF communication transceiver systems. PLL systems exist in variety of high frequency applications, from simple clock circuits, to local oscillators (LOs) for high performance radio communication links, and ultra-fast switching frequency synthesizers in vector network analyzers (VNA). This course explains different types of PLLs with detailed explanations on individual sub-blocks. It includes PLL design and calculations with lots of examples and homework. There are also system level simulations and behavioral design using Advanced Design System (ADS) software. Phase noise of PLL is discussed in this course using equations, systems analysis, and there are tutorials that guide you to simulate the behavioral phase noise model of PLL and observe the system impact on VCO phase noise. There are also discussion about fractional PLL concept and features in this course. It is important to remind you that this course covers the behavioral analysis of PLL sub-blocks however, it does not include any transistor level simulation and this topic will be covered on different course which will be released by Rahsoft in the future. Prerequisites and topics you need to be familiar with for this course are:Electronics and analog circuit design (intermediate level)Control Theory (basic level)ADS softwareConcepts such as:open and closed Loop gainOpen loop - close loop systemsFeedbackTransfer functionPhase marginCMOS transistorBasic op ampLaplace transformPlease be advised that this course contains more math than previous courses.PLL system design requires an understanding of transfer function derivations and stability analysis which needs system calculations and involves university level mathematical calculations.
