High-Level Synthesis for FPGA, Part 1-Combinational Circuits

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课程主页: https://www.udemy.com/course/hls-combinational-circuits/

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**课程总结:FPGA 高层次综合入门(一)—— 组合逻辑电路** 这门 Coursera 课程是关于 FPGA 高层次综合(HLS)设计流程的入门介绍。课程目标是教授学员如何仅使用 C/C++ 语言,无需借助 VHDL 或 Verilog 等硬件描述语言,即可在 FPGA 上描述、调试和实现组合逻辑电路。 HLS 已被 Nvidia 和 Google 等行业巨头广泛应用于其软硬件平台的开发。作为未来硬件设计的发展趋势,掌握 HLS 技能对于希望利用 FPGA 的卓越性能和低功耗特性的硬件或软件工程师而言,已成为一项必备技能。 本课程将利用 Xilinx HLS 软件和硬件平台,通过真实案例和应用来阐释 HLS 的概念和技术。课程将从零开始,结合数字逻辑电路的概念,构建 HLS 设计流程和技能。学员将通过多个示例深入理解 HLS 的概念和技术,并通过大量的随堂测验和练习巩固所学方法和技巧。 本课程是 HLS 系列课程的第一部分,专注于组合逻辑电路的设计。后续课程将进一步介绍如何使用 HLS 设计顺序逻辑电路、进行算法加速,以及构建混合 CPU+FPGA 异构系统。

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This course is an elementary introduction to high-level synthesis (HLS) design flow. The goals of the course are describing, debugging and implementing combinational logic circuits on FPGAs using only C/C++ language without any help from HDLs (e.g., VHDL or Verilog). The HLS is recently used by several industry leaders (such as Nvidia and Google) to design their hardware and software platforms. The HLS design flow is the future of hardware design, which quickly becomes a must-have skill for every hardware or software engineer who is keen on utilising FPGAs for their exceptional performance and low power consumption.It uses the Xilinx HLS software and hardware platforms to demonstrate real examples and applications. This course is the first to build the HLS design flow and skills along with the digital logic circuit concepts from scratch. Throughout the course, you will follow several examples describing HLS concepts and techniques. The course contains numerous quizzes and exercises for you to practice and master the proposed methods and approaches.This course is the first of a series of courses on HLS in designing hardware modules and accelerating algorithms on a target FPGA. Whereas this course focuses on combinational circuits. The other courses in the series will explain how to use HLS in designing sequential logic circuits, algorithm acceleration, and hybrid CPU+ FPGA heterogeneous systems.

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