|
所在平台: Udemy |
课程主页: https://www.udemy.com/course/functional-verification-using-embedded-uvm-part-1/
课程评论：没有评论
课程名称：VSD - 使用嵌入式UVM的功能验证 - 第1部分 课程概述：本课程是为希望从后端转向前端的人士或对VLSI验证领域感兴趣的学员量身定制的，它从基础知识开始，逐步深入到高级UVM的内容。该课程之所以被称为“手工制作”，是因为它采用开源工具进行实验教学，本部分将涵盖系统级芯片（SoC）设计流程、功能验证基础、趋势与挑战、开源嵌入式UVM的介绍、仿真以及被验证设计（DUT）等内容。 关于嵌入式UVM：嵌入式UVM是IEEE 1800.2标准的通用验证方法学（UVM）开源实现。在本课程中，我们将深入探讨嵌入式UVM及其作为功能验证和SoC-FPGA仿真平台的应用案例。 讲师简介：Puneet Goel毕业于Punjab Engineering College（1994年）电子专业，在VLSI行业有24年的工作经验，曾在STMicro、摩托罗拉、德州仪器和TranSwitch等公司工作。在Coverify Systems Technology工作了8年，提供验证服务并致力于创建可行的开源芯片验证解决方案，Puneet是嵌入式UVM的主要开发者。
Now here's a course, "hand-crafted" for anyone and everyone, who want to move from back-end to front-end OR for people just curious to know and learn, what exactly happens in field of VLSI verification. The reason its "hand-crafted" is because it starts from very basics and in coming parts of this course, things will slowly move towards advanced level UVM.Another reason for this course to be "hand-crafted" is due to the open-source tool used to cover labs introduced in this course. This is Part - 1 in the "Verification Series". This part will cover SoC design flow, basics of functional verification, trends and challenges, introduction to open-source Embedded-UVM, emulation, and the DUTAbout Embedded-UVM:Embedded UVM is an opensource implementation of IEEE 1800.2 standard of Universal Verification Methodology. In this webinar, we take a dive into Embedded UVM and its use cases as a platform for Functional Verification and SoC-FPGA based Emulation.About Speaker:Puneet Goel is a 1994 graduate in Electronics from Punjab Engineering College. He has 24 years of experience in the VLSI industry where he worked for STMicro, Motorola, Texas Instruments and TranSwitch. For the past 8 years, he has been working for Coverify Systems Technology, where he provides verification services and works on creating viable opensource solutions for chip verification. Puneet is the main developer of Embedded UVM.
