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所在平台: Udemy |
课程主页: https://www.udemy.com/course/func-verif/
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课程名称：功能验证 - 全面视角 课程概述： 功能验证是ASIC设计周期中最耗时的过程之一，但在这一领域缺乏系统的入门课程和培训。该课程填补了这一空白，提供了功能验证所有方面的深入介绍，包括不同的测试平台架构。课程内容涵盖从验证架构到构建测试平台、门级仿真，以及用于验证的各种技术，如仿真、形式验证和仿真等。 课程目标： 1. 探讨什么是验证及其必要性和实现方式。 2. 研究不同的测试平台架构。 3. 提出广泛使用的指南和方法论的必要性。 4. 详细阐述行业中使用的不同术语和流行词汇。 5. 介绍功能验证的不同阶段，如RTL仿真、门级仿真、仿真等，并讨论每一阶段面临的挑战。 课程大纲： - 第一节：引言 - ASIC设计流程 - 范式转变 - 验证挑战 - 快速验证101 - 第二节：不同的验证技术 - 基于仿真的方法 - 形式方法 - 等价检查 - 模型检查 - 定理证明 - 混合验证 - 基于FPGA和处理器的验证 - 第三节：度量驱动验证（MDV） - 代码覆盖率 - 断言覆盖（控制中心） - 功能覆盖（数据中心） - 第四节：编写测试平台 - 测试平台是什么？ - 基础测试平台 - 基础的TCL测试平台 - 基础的HDL测试平台 - 第五节：验证中的覆盖率测量 - 覆盖率是什么？ - 覆盖率的类型 - 行覆盖率 - 条件覆盖率 - 切换覆盖率 - FSM覆盖率 - 功能覆盖率 - 第六节：门级仿真（GLS）与SDF注释 - 门级仿真概述 - SDF注释 - 常见时序违例 - 第七节：回归 - 保持设计稳定 - 回归的必要性 - 验证管理 - 第八节：提示与技巧，最佳实践（BKMs） - 编码技巧 - 方法论笔记 - 总结 本课程适合希望深入了解功能验证流程及其各种技术和方法的学习者。
OverviewFunctional Verification is one of the most time-consuming processes in ASIC design cycle; yet a structured introductory course/training/education on this topic is often missing. Neither the educational institutes offer this nor there are vendors offering such training. While several language specific courses are offered by EDA vendors, a comprehensive training on fundamentals of functional verification is lacking. This course gives you an in-depth introduction to the different aspects of functional verification including different testbench architectures. This course covers all aspects of functional verification ranging from verification architecture to building testbenches, gate level simulation and various technologies used in verification such as simulation, formal, emulation.ObjectivesTo explore what is verification and why it is needed and how it is achieved.To examine the different testbench architectures availableTo suggest widely used guidelines and need for a methodologyTo elaborate on all the different terminologies, buzz words used in the industryTo introduce different stages in functional verification such as RTL simulation, gate level simulation, emulation etc. and to address the challenges in each one of themTable of ContentsSession 1: IntroductionASIC Design FlowParadigm ShiftVerification ChallengeA quick Verification 101Session 2: Different Verification TechnologiesSimulation basedFormal methodsEquivalence checkingModel checkingTheorem ProvingHybridEmulationFPGA basedProcessor basedSession 3: Metric Driven Verification (MDV)Code CoverageAssertion coverage (Control Centric)Functional Coverage (Data centric)Session 4: Writing TestbenchesWhat is a testbench anyway?Basic testbenchesRudimentaryTCL basedHDL based - basic onesSession 5: Coverage measurement in VerificationWhat is coverage?Types of coverageLine CoverageCondition CoverageToggle CoverageFSM CoverageFunctional CoverageSession 6: Gate Level Simulation (GLS) & SDF annotationWhat is Gate Level SimulationSDF Annotation - typical timing violationsSession 7: Regressions - keeping the design stableNeed for regressionsVerification managementSession 8: Tips & tricks, Best Known Methods (BKMs)Coding tipsMethodology notesSummary
