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所在平台: Udemy |
课程主页: https://www.udemy.com/course/embedded-system-design-with-xilinx-zynq-fpga-and-vivado/
课程评论：没有评论
课程名称：Xilinx Zynq FPGA和VIVADO的嵌入式系统设计 课程概述：本课程关注于利用Xilinx的VIVADO设计套件和Zynq FPGA进行硬件（FPGA）设计，旨在帮助想要提升嵌入式硬件设计技能的爱好者。课程更新包含HLS设计实验室和调试课程，内容涵盖VIVADO的介绍、知识产权（IP）、IP设计方法论、使用VIVADO和SDK设计基本嵌入式系统、创建自定义AXI-4 Lite LED控制器IP、对Zynq处理系统（PS）的编程、应用项目的使用，以及如何利用SDK进行定时器API和调试功能的操作。此外，课程还涵盖了如何为Zynq（ZedBoard）的SD和QSPI闪存创建应用项目的启动映像。最后，课程包含关于“使用VIVADO HLS进行嵌入式设计”的环节，讲解HLS设计方法论、HLS C/C++项目的综合、从C/C++生成RTL/HDL以及将C/C++项目导出为IP-XACT/Pcore/Sys Gen格式。 通过本课程，您将获得从简单嵌入式系统（内存测试应用）到复杂应用设计（利用定时器、调试等）的设计和实现技能，以及创建应用项目的可引导映像文件。有关更多详细信息，请观看演示视频和一些免费视频。
Note: Course is updated with HLS Design Lab & Debugging Sessions.Embedded System Design with Xilinx VIVADO Design Suit and Zynq FPGA is targeted for Hardware (FPGA) Design and Embedded enthusiast who want to upgrade and enhance their hardware(FPGA) Design Skills with State of Art Design Tools and FPGA from Xilinx. This course cover from Introduction to VIVADO, Intellectual Property (IP), IP Design Methodology, designing basic embedded system with Vivado and SDK, Creating custom AXI-4 Lite Led Controller IP, Programming Processing System (PS) of Zynq (i.e Zedboard) with Embedded Application projects from SDK , Utilizing Timer API and Debugging Features on SDK for Zynq PS, and Creating Boot Image of the Application Project for SD and QSPI flash of Zynq (ZedBoard).Finally we have included the session on "Embedded Design with VIVADO HLS" this session includes the HLS Design Methodology, Synthesizing HLS C/C++ Project, Generating RTL/HDL from C/C++ and Exporting C/C++ project in to IP-XACT/ Pcore/Sys Gen Format.So from this course you will able to get design/implementation skills of simple embedded system (Memory Test Application) to complex application design (utilizing Timer, Debugging etc.) and Create Bootable Image file of the application project.For more details please watch the demo video and some Free video of course.
