Expanded FPGA Training with NIOS II

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课程主页: https://www.coursera.org/archive/fpga-training-nios-ii

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课程大纲

Hardware setup and verification for DE10-Lite with VGA monitor output
Methods and approaches for testing FPGA designs
NIOS II IP for Video and Performance Monitoring

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The complexity of digital logic designs requires understanding of large scale devices such as Field Programmable Gate Arrays (FPGAs) to realize solutions. Implementation in discrete components is nearly impossible to realize and debug due to the growing complexity of solutions. Integration of processor capability into one platform enables reduction in size and conservation of power with improved microelectronic hardware. The focus of this specialization is the practical use of Soft Processors with emphasis on testing and debugging in applications of video. Hands on bring up of DE10-Lite board with expansion into the use of the VGA output interface is provided. Focus on the use of the NIOS II processor to control Video IP for generation of test pattern output after reviewing the sample test pattern demonstration in Verilog. Review of the manual for the implementation of Video IP for display of signals using the Avalon-ST streaming protocol is covered. Tools for the design of systems are provided which include the System Console and TCL scripts for evaluation of board and processor interfaces with custom project, and an embedded Logic Analyzer for probing of signal values to characterize performance and state transition. A traffic light controller and thunderbird tail lights are used to provide hands-on examples.

使用NIOS II进行扩展的FPGA培训:数字逻辑设计的复杂性要求了解诸如现场可编程门阵列(FPGA)之类的大型设备,以实现解决方案。由于解决方案的复杂性日益提高,几乎不可能实现和调试分立组件。将处理器功能集成到一个平台中,可以通过改进的微电子硬件来减小尺寸并节省功耗。本专业的重点是软处理器的实际使用,重点是视频应用程序中的测试和调试。 提供动手操作DE10-Lite板,并扩展为使用VGA输出接口。在回顾了Verilog中的示例测试模式演示之后,着重于使用NIOS II处理器控制Video IP以生成测试模式输出。涵盖了有关使用Avalon-ST流协议显示信号的视频IP实现手册的回顾。提供了用于系统设计的工具,包括用于评估带有自定义项目的板卡和处理器接口的系统控制台和TCL脚本,以及用于探测信号值以表征性能和状态转换的嵌入式逻辑分析仪。交通信号灯控制器和雷鸟尾灯用于提供实际操作示例。

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