Introduction to FPGA Design for Embedded Systems

所在平台: Coursera

课程主页: https://www.coursera.org/learn/intro-fpga-design-embedded-systems

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课程简介

课程名称：嵌入式系统的FPGA设计导论 课程概述：该课程可作为学分课程E-CEA 5360，属于CU Boulder电气工程硕士学位的一部分。可编程逻辑已成为构建电子系统的核心技术，影响日益扩大。通过集成软核或硬核处理器，这些设备逐渐演变为完整的系统单芯片，逐步取代通用处理器和ASIC，尤其是在高性能系统的实现中，FPGA的应用已几乎成为必然。 本课程将为您提供FPGA设计在嵌入式系统中的基础知识及实用设计技能。您将学习FPGA的定义及其技术的发展历程，如何为特定应用选择最佳的FPGA架构，使用最先进的软件工具进行FPGA开发，并解决数字设计中的关键问题。课程中，您将使用FPGA开发工具完成多个示例设计，包括定制处理器。如果您考虑从事电子设计行业或是希望转行的工程师，该课程将为您提供很好的职业发展机会。 硬件要求： 您需要访问计算机资源以运行开发工具，需使用Windows 7、8或10操作系统的PC，或RHEL 6.5以上版本的Linux操作系统。Linux可以在Windows 8或10下作为虚拟机运行。开发工具不支持苹果Mac计算机。无论使用哪种操作系统，计算机至少需要8 GB RAM。大多数新款笔记本电脑都满足这一要求，或可通过升级内存满足。 课程大纲： 1. 模块名称：可编程逻辑的历史与架构 描述：了解可编程逻辑设备的发展历程及架构，区分FPGA、CPLD、ASSP和ASIC，设计逻辑电路，示例包括FPGA中的数字加法器和乘法器设计。 2. 模块名称：FPGA设计工具流程；示例设计 描述：安装并使用FPGA设计工具创建示例设计，学习标准FPGA设计流程，使用Intel Altera的Quartus Prime开发套件创建流水线乘法器，并通过RTL Viewer和ModelSim进行设计验证。 3. 模块名称：FPGA架构：SRAM、FLASH与抗熔断 描述：学习不同类型FPGA的优缺点，探讨FLASH、SRAM和抗熔断FPGA，并分析现代FPGA架构，以确定最适合设计的FPGA类型。 4. 模块名称：使用原理图输入工具进行可编程逻辑设计 描述：扩展模块2的设计，增加IP块，实现引脚分配并创建FPGA的编程文件。通过使用设计技术如流水线等，提高设计生产力，实现NIOS II软核处理器设计，为定制处理器提供强大的能力。 以上内容概述了本课程的目标与结构，旨在帮助学员掌握FPGA在嵌入式系统设计中的应用和技术。

课程大纲

Name:What's this programmable logic stuff anyway? History and Architecture

Description:What's this programmable logic stuff anyway? In Module 1 you learn about the history and architecture of programmable logic devices including Field Programmable Gate Arrays (FPGAs). You will learn how to describe the difference between an FPGA, a CPLD, an ASSP, and an ASIC, recite the historical development of programmable logic devices; and design logic circuits using LUTs. Examples will include designs of digital adders and multipliers in FPGAs.

Name:FPGA Design Tool Flow; An Example Design

Description:In Module 2 you will install and use sophisticated FPGA design tools to create an example design. You will learn the steps in the standard FPGA design flow, how to use Intel Altera’s Quartus Prime Development Suite to create a pipelined multiplier, and how to verify the integrity of the design using the RTL Viewer and by simulation using ModelSim. Using the TimeQuest timing analyzer, you will analyze the timing of your design to achieve timing closure.

Name:FPGA Architectures: SRAM, FLASH, and Anti-fuse

Description:FPGAs are programmable, and the program resides in a memory which determines how the logic and routing in the device is configured. In Module 3 you will learn the pros and cons of FLASH-based, SRAM-based, and Anti-Fuse based FPGAs. A survey of modern FPGA architectures will give you the tools to determine which type of FPGA is the best fit for a design. Architectures will be explored from the basic core logic cell up to consideration of large Intellectual Property (IP) blocks that are available on many FPGAs.

Name:Programmable logic design using schematic entry design tools

Description:In module 4 you will extend and enhance your design from module 2, completing the design by adding IP blocks, implementing pin assignments and creating a programming file for the FPGA. One outcome will be improved design productivity, by use of design techniques like pipelining, and by the use of system design tools like Qsys, the system design tool in Quartus Prime. You will complete a Qsys system design by creating a NIOS II softcore processor design, which quickly gives you the powerful ability to customize a processor to meet your specific needs.

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