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所在平台: Coursera |
课程主页: https://www.coursera.org/learn/fundamentals-of-digital-design-for-vlsi-chip-design
课程评论：没有评论
课程名称：VLSI芯片设计的数字设计基础 概述：本课程提供了对布尔代数及其在数字电路设计中的应用的全面学习模块。课程内容涵盖了布尔变量、逻辑门及其与数字逻辑电路关系等基本概念。参与者将深入探索布尔表达式、简化技术和共识定理，包括先进的奎因-麦克拉斯基方法。此外，课程还将讨论组合电路，详细介绍加法器、减法器与奇偶校验电路的设计与功能。 教学大纲： 1. **数字基础** - 详细探讨布尔代数及其在数字电路设计中的实际应用，包括布尔变量、逻辑门与数字电路的关系，布尔表达式、简化技术以及共识定理的推导。课程还将覆盖普适门实现布尔函数和使用卡诺图进行简化的实用方面，并介绍奎因-麦克拉斯基方法。 2. **组合逻辑设计** - 深入探讨组合电路及数字系统中的算术运算。参与者将学习各种电路的设计与功能，包括加法器、减法器、奇偶校验电路和乘法器，并讨论编码与解码的复杂性，介绍不同类型的编码器、解码器、多路复用器和解多路复用器。此外，还包括使用多路复用器进行有效设计的二进制移位操作。 3. **时序逻辑设计** - 深入研究时序电路，包括基本概念、存储元件和多种类型的触发器。参与者将获得关于锁存器和触发器电路设计与操作的洞察，包括SR锁存器、JK触发器、主从JK触发器、带门SR锁存器、D锁存器和D触发器。课程还讨论数字电路中的危险性，并解释时序电路的特性与应用。此外，还将研究寄存器的结构、操作及其类型，包括双向移位寄存器，最后深入覆盖计数器，包括环计数器、约翰逊计数器、异步上下计数器、同步上下计数器及mod-n同步计数器，并介绍Mealy与Moore状态时序电路的概念，涵盖状态图、等效状态表与简化技术的设计。 4. **可编程逻辑设备** - 本模块提供对存储系统及可编程逻辑设备的全面理解，并探讨VLSI中的物理设计考虑因素。参与者将了解包括SRAM和DRAM在内的各种存储类型，分析其内部结构和寻址机制。课程还包括三态数字缓冲器、只读存储器（ROM）、编程逻辑设备（PLD）如PROM、PLA和PAL的内容。此外，还讨论复杂可编程逻辑设备（CPLD）和现场可编程门阵列（FPGA）的架构与实现，深入了解VLSI设计周期、分层设计、路由、压缩、提取和验证。课程将探索各种VLSI设计风格，并阐述CPLD、SPLD和FPGA的设计过程。
Name:Digital Fundamentals
Description:This comprehensive learning module provides a detailed exploration of Boolean algebra and its practical applications in digital circuit design. Participants will delve into fundamental concepts such as Boolean variables, logic gates, and the relationship between Boolean algebra and digital logic circuits. The module progresses to cover Boolean expressions, simplification techniques, and the derivation of consensus theorems. Practical aspects, including the implementation of Boolean functions using universal gates and the use of Karnaugh maps for simplification, are thoroughly examined. The module also introduces the Quine McCluskey method as an advanced tool for Boolean expression simplification.
Name:Combinational Logic Design
Description:This comprehensive module delves into the intricate world of combinational circuits and arithmetic operations in digital systems. Participants will explore the design and functionality of various circuits, including adders, subtractors, parity circuits, and multipliers. The module navigates through the complexities of encoding and decoding, introducing different types of encoders, decoders, multiplexers, and demultiplexers. Additionally, the module covers binary shifting operations, including logical and arithmetic shifting, utilizing multiplexers for efficient design.
Name:Sequential Logic Design
Description:This comprehensive module provides an in-depth exploration of sequential circuits, covering the fundamental concepts, storage elements, and various types of flip-flops. Participants will gain insights into the design and operation of latch and flip-flop circuits, including SR latch, JK flip-flop, master-slave JK flip-flop, Gated SR latch, D latch, and D flip-flop. The module delves into hazards in digital circuits and explains the characteristics and applications of sequential circuits. Furthermore, the structure, operation, and types of registers are examined, alongside bidirectional shift registers. The module concludes with an extensive coverage of counters, including ring counters, Johnson counters, asynchronous up/down counters, synchronous up/down counters, and mod-n synchronous counters. The concepts of Mealy and Moore state sequential circuits are introduced, including the design of state diagrams, equivalent state tables, and reduction techniques.
Name: Programmable Logic Devices
Description:This module provides a comprehensive understanding of memory systems and programmable logic devices, along with insights into physical design considerations in VLSI. Participants will explore various types of memories, including SRAM and DRAM, examining their internal structures and addressing mechanisms. The module covers tri-state digital buffers, Read-Only Memory (ROM), Programmable Logic Devices (PLD) such as PROM, PLA, and PAL. Additionally, the architecture and implementation of Complex Programmable Logic Devices (CPLD) and Field-Programmable Gate Arrays (FPGA) are discussed. The module delves into the VLSI design cycle, hierarchical design, routing, compaction, extraction, and verification. Various VLSI design styles are explored, and the design processes for CPLD, SPLD, and FPGA are elucidated.
This comprehensive learning module delves into Boolean algebra and its applications in digital circuit design, covering fundamental concepts like Boolean variables, logic gates, and their relationship with digital logic circuits. Participants explore Boolean expressions, simplification techniques, and consensus theorems, including the advanced Quine McCluskey method. The module also addresses combinational circuits, detailing the design and functionality of adders, subtractors, parity circuits,
